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The CPU only pretends to be a CPU. In reality, it is a small datacenter comprised of several small special purpose computers doing all the work. I gave up under
by fhars 4y ago
The CPU only pretends to be a CPU. In reality, it is a small datacenter comprised of several small special purpose computers doing all the work. I gave up understanding CPUs in depth by the time I read an introducion to Intel's then-new i860 CPU in the April issue of a magazine and it turned out to be a real device.
- psychphysic 4y agoBest explanation in my opinion. Almost like a CPU has an JIT emulator for x86.
- yvdriess 4y agoucode cracking is relatively straightforward, I wouldn't call it a JIT. https://intelxed.github.io/ref-manual/ https://intelxed.github.io/ref-manual/ It's more like an intepreter for x86, seeing as it is actually executed on a dataflow architecture.
- psychphysic 4y agoMacro op fusion is more what I had in mind when I called it JIT and not interpretation. Not sure what the distinction is but that's where it is to my mind
- yvdriess 4y agoIt's true that the distinction is a bit vague, the term JIT is overloaded to enough that it stopped being a useful technical term. Compared to 'JVM JIT' or 'LuaJIT': there is no instrumentation to detect what is hot or not. The CPU frontend will crack x86 instructions into micro-ops, while looking for some patterns to merge certain instructions or uops into larger micro-ops. The micro-coded instructions (like many of the legacy instructions) are likely just lookups. Most of this is my speculation, mind. Modern CPU frontends are still kind of a black magic box to me, but I think they are limited by relatively simple transformations by virtue of being on the critical execution path.
- to11mtm 4y agoThere is a Micro-op cache in play in many cases like Zen [0], but I'm not entirely sure what it does. [0] - https://chipsandcheese.com/2022/11/05/amds-zen-4-part-1-frontend-and-execution-engine/ https://chipsandcheese.com/2022/11/05/amds-zen-4-part-1-fron...
- AstralStorm 4y agoMicro-op cache is literally L1 cache after the instructions are broken into micro-ops. It's not a magic arc profiling optimization either.
- oblio 4y agoHeck, at this point I think phone chargers run a "real" OS to manage USB-C charging.