3 ms·
> fp registers shared with mmx, sse registers (xmm), avx registers (ymm), and a truckload of them The xmm registers are the low 128 bits of the ymm registers.
by jcranmer 4y ago
> fp registers shared with mmx, sse registers (xmm), avx registers (ymm), and a truckload of them
The xmm registers are the low 128 bits of the ymm registers. So you're left with three register files, consisting of 8, 16, and 16 registers each. The only thing out of the ordinary there is the x87 register state, although maybe you'd consider the unusually small size of the register sets as out of the ordinary nowadays (e.g., RISC-V and AArch64 each provide 32 registers in their two register files).
- jabl 4y agoAVX-512 extends the vector registers to 32 (zmm0->zmm31).
- jcranmer 4y agoAnd adds I believe 7 mask registers. And is not implemented on the chip in question, making it a irrelevant for considering the complexity ostensibly leading to the hardware bug under discussion.
- cesaref 4y agoAlthough it has been discontinued by Intel in their latest 12th gen desktop processors.