3 ms·
That's only partially true. SRAM doesn't need to be refreshed constantly like DRAM, so SRAM will use LESS power when not switching. We think it's different bec
by hajile 4y ago
That's only partially true.
SRAM doesn't need to be refreshed constantly like DRAM, so SRAM will use LESS power when not switching. We think it's different because something like L1 cache is CONSTANTLY switching. It should be noted that the power cost per GB still isn't worse than DRAM, but there's way more data being transferred.
Once you reach L3/L4 cache, it's not switching nearly as often and the actual total power becomes way less than sending data over from RAM. This is one reason why AMD (and now Nvidia) saved so much power with Infinity Cache on RDNA 2.
The big issue with SRAM is that it requires 6 transistors per bit while DRAM requires 1 bit plus 1 capacitor, so capacity per mm2 of die area is much worse. That capacitor keeps thing cheap, but is also the reason why individual DRAM cells can only operate at 300-500MHz while SRAM can easily operate into the many GHz range.
- cma 4y agoInteresting. Why with SRAM is switching so much more power consuming than just maintaining? I thought with a flip flop every gate is used on pretty much every cycle while it feeds back on itself. I would have thought reading/writing SRAM is much more expensive than idling it not because of the cost of toggling the flip-flop, but all the cache coherency stuff associated with making a change in multicore.