4 ms·

So at what point does something become special purpose? Is L1, L2 or L3 cache special purpose? What about io chips? What about the firmware inside ethernet card

So at what point does something become special purpose? Is L1, L2 or L3 cache special purpose? What about io chips? What about the firmware inside ethernet cards, harddrives or the video chips (not even talking about GPUs). I'm not trying to be combatitive, but it seems completely arbitrary where one would draw a line and taken to the extreme one is essentially left with a CPU and possibly some RAM that might be some ideal computing machine, but can't even talk to the outside world.

ggm 4y ago
On chip to me, is integrated. but with multi core. shared facilities on the die are a bit of a bottleneck sometimes (I don't do this for a living, thats how I understand it) So the whole 'hyperthreading is cool, 2x the CPU' thing: it turns out that as long as your e.g. integer only, true. If you invoke FP, not true: they stall. L1 cache in some instances is now big enough some people's code never leaves it. Nobody who lives above a compiler should ever have to worry about this. I live above scripts. I don't really worry about this. I just hark back to when I ran these boxes, on raised floors, remembering how .. distasteful adjunct computing equipment was. It was completely asynchronous, required it's own resets, interfered with cabling, had effects on the bus (unibus!) you didn't entirely understand, they made life "harder" for operations. Did they speed things up? Sure!
meltyness 4y ago
Funny, in this light, GPT-3 accelerator is like strapping a cache of the entire internet and knowledge of humanity to your board.
- minxomat 4y ago
  GPT-3 might be the ultimate contender for https://en.m.wikipedia.org/wiki/Hutter_Prize https://en.m.wikipedia.org/wiki/Hutter_Prize - now if we could only find the prompts to recover it all
ppod 4y ago
>one is essentially left with a CPU CPU? Ooh you lucky, lucky sod. Back in my day, you wanted an OR gate you had to string some NANDS together.

ggm 4y ago

On chip to me, is integrated. but with multi core. shared facilities on the die are a bit of a bottleneck sometimes (I don't do this for a living, thats how I understand it) So the whole 'hyperthreading is cool, 2x the CPU' thing: it turns out that as long as your e.g. integer only, true. If you invoke FP, not true: they stall. L1 cache in some instances is now big enough some people's code never leaves it. Nobody who lives above a compiler should ever have to worry about this. I live above scripts. I don't really worry about this. I just hark back to when I ran these boxes, on raised floors, remembering how .. distasteful adjunct computing equipment was. It was completely asynchronous, required it's own resets, interfered with cabling, had effects on the bus (unibus!) you didn't entirely understand, they made life "harder" for operations. Did they speed things up? Sure!

meltyness 4y ago

Funny, in this light, GPT-3 accelerator is like strapping a cache of the entire internet and knowledge of humanity to your board.

minxomat 4y ago
GPT-3 might be the ultimate contender for https://en.m.wikipedia.org/wiki/Hutter_Prize https://en.m.wikipedia.org/wiki/Hutter_Prize - now if we could only find the prompts to recover it all

ppod 4y ago

>one is essentially left with a CPU CPU? Ooh you lucky, lucky sod. Back in my day, you wanted an OR gate you had to string some NANDS together.