The one contradiction I have to point out here is that server motherboards dont need big southbridges: the cores themselves have gobs of PCIe. 1 and 2P AMD Epyc

The one contradiction I have to point out here is that server motherboards dont need big southbridges: the cores themselves have gobs of PCIe. 1 and 2P AMD Epyc server cores have 128 lanes of PCIe. I wish modern chips did a better job of breaking down where power went. It'd be so interesting to know how much power is going to usb controllers, how much is going to PCIe. I'd also hope that they could do things like shut down parts of the chip, if there's no USB or PCIe devices plugged in. But these chips seem to have a pretty high starting place of power consumption. Although maybe it's in part because the first example were flagship motherboards with a whole bunch of extra things peppered across the board - fancy NIC chips, supplementary thunderbolt controllers, sound cards, wifi - so maybe there was just an unusual lot of extra stuff going on. But it has been shocking seeing idle power raise so much on the modern platforms. It feels like there's a lot of room for improvement in power-down.