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> reduce power consumption by up to 50%, improve performance by 30% and reduce area by 35% To be clear, you don't get all three. Also, are these Apple's numbe
by nsteel 4y ago
> reduce power consumption by up to 50%, improve performance by 30% and reduce area by 35%
To be clear, you don't get all three.
Also, are these Apple's numbers? They are better than what TSMC say (1st gen) 3nm silicon provides:
> N3 technology will offer up to 70% logic density gain, up to 15% speed improvement at the same power and up to 30% power reduction at the same speed as compared with N5 technology
https://www.tsmc.com/english/dedicatedFoundry/technology/logic/l_3nm https://www.tsmc.com/english/dedicatedFoundry/technology/log...
- jb1991 4y agoI’m curious why not? Apple Silicon so far has improved performance, and reduced power consumption. Does that mean that it’s a larger chip than the others that came before it?
- maven29 4y agoThey got there by skimping on IO
- manmal 4y agoPlease elaborate. IO is really not an issue in the M* machines I‘ve used - on the contrary.
- adgjlsfhk1 4y agonone of the M1 laptops let you use multiple external monitors and all of the M1 products have much lower limits on storage than PCs.
- dev_tty01 4y agoNot true. Depending upon the processor choice, M1, M1 pro, or M1 max, you get 1, 2, or 4 external monitors. Up to 64 GB ram. Do you really need more than 64 GB? The number of users who actually need more are a very small part of the market.
- jb1991 4y agoAnd the M1 Ultra even offers up to 128 GB RAM -- and that is also unified with GPU RAM.
- ihateolives 4y agoThe price of RAM is absolutely bonkers though. If i ever need more than 16GB of RAM and more than 512GB of storage, I'll strongly consider moving back to Thinkpads or something.
- amoss 4y agoThere is a trade-off between the three kinds of improvements. It is possible to pick some points (for example) that give a less than maximum power reduction as well as a less than maximum speed improvment. I think the comparison would be the Apple Silicon that they released is larger than a (hypothetical) alternative that only improved performance but kept the other two constant.
- DennisP 4y agoMaybe X*Y*Z=K but K increases over time. Ten years ago, we couldn't do what we can do now.
- warrenm 4y ago"Speed" != "Performance" '70% logic density gain' sounds like 'reduce area by 35%' to me The only one that might not line up is 'reduce power consumption by up to 50%' vs 'up to 30% power reduction at the same speed as compared with N5 technology' ...but you have to know what's being compared before deciding the numbers do (or don't) make sense
- SuchAnonMuchWow 4y agoAbout the area, keep in mind that not every part of a chip is composed of dense logic: Typically, sram (cache memories for example) doesn't scale as much as core logic, and interconnect (connections between the cores, DDR, etc...) almost don't scale at all. This is highly dependent on the design of the SoC, but the core logic is rarely the largest of the three, so you will not see a 35% reduction of the total area of the chip: only of the areas the most densely packed with logic. What you could have for example is a 35% more powerful neural network accelerator in the same area as the previous generation. But you will not have 35% bigger cache.
- nsteel 4y agoHave you seen the 3nm SRAM scaling? It's really depressing. It won't bother CPUs too much but other devices are going to struggle to scale.
- hajile 4y agoN3 scaling? There's literally zero scaling. N3 is a stop-gap as TSMC is behind on their N2 GAA process. It's not so different from Intel's 14nm++++++ where it was dramatically better than before, but still not enough.
- warrenm 4y ago> About the area, keep in mind that not every part of a chip is composed of dense logic No, but improving density still makes it smaller (for an otherwise-"identical" offering) :)
- ARandomerDude 4y ago
- turnsout 4y ago> Also are these Apple's numbers? Hope it's obvious, but no, they are not Apple's numbers—this is a rumor about unreleased products.
- nsteel 4y agoBizarrely it seems the parent plucked those numbers from a Samsung 3mn press release! That's why they don't make sense in the context of TSMC 3nm. I've never had a presentation from Samsung, I guess they need to say something special.
- dev_tty01 4y ago>To be clear, you don't get all three. Actually you do. The branding is called FinFlex, but the upshot is that you can use different FETs for different parts of a circuit. So some critical timing bottleneck blocks could be built with performance optimized FETs and other blocks can optimize for low power. The numbers from TSMC for N3E are +18% speed improvement at same power, -34% power reduction at same speed, and 1.7x density improvement. https://www.tomshardware.com/news/tsmc-outlines-3nm-roadmap https://www.tomshardware.com/news/tsmc-outlines-3nm-roadmap >Also, are these Apple's numbers? Ha ha. That's funny. Does Apple ever release any numbers prerelease?