It's far worse than you make it out to be. Max internal clocks on DDR4/5 are about 400MHz. There's a fundamental limit (rapidly diminishing return) to how fast

It's far worse than you make it out to be. Max internal clocks on DDR4/5 are about 400MHz. There's a fundamental limit (rapidly diminishing return) to how fast you can drain and charge capacitors. They try to make up for it by reading/sending entire row(s) at one time and sending quickly over the wire, but that's clearly reliant on cache line optimization of the program and doesn't do much to improve real-world latencies.