Using shorter virtual addresses make for a simpler page table and translation lookaside buffer (TLB) design. Intel processors support up to 57 bit virtual addr

Using shorter virtual addresses make for a simpler page table and translation lookaside buffer (TLB) design. Intel processors support up to 57 bit virtual addresses (128 PB), in a 5-level page table. The trade-off to increased size is an increase in worst case latency reading a virtual address.