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What are you talking about? Intel's 65nm (Pentium M) can still beat similarly clocked (1.5 Ghz) ARMs at 28nm - that's not due to process, that's due to a much

by berkut 15y ago

What are you talking about? Intel's 65nm (Pentium M) can still beat similarly clocked (1.5 Ghz) ARMs at 28nm - that's not due to process, that's due to a much more powerful architecture designed for speed over power consumption (Pentium M, then Core, Core 2). The instructions that fault are the very rarely used ones like weird string processing ones. Those are not going to be used in the middle of number-crunching loops. Escaping float ops hasn't been needed since the 486 days, so I'm not sure what on earth you're talking about. Intel's branch predicting and memory / cache pre-fetching are the best in the business. To say their CPUs are "lackluster CPU design", is pretty ridiculous, despite Atom being pretty crap.

wolf550e 15y ago
> Intel's 65nm (Pentium M) can still beat similarly clocked (1.5 Ghz) ARMs at 28nm You can only compare chips that have the same power consumption. A 1w chip against a 45w (or whatever) chip is not a comparison you can make. Specifically, Intel now demonstrates a Penwell SoC with a Saltwell (Atom) core made on Intel's 32nm LP process and it benchmarks well against Cortex-A9 chips made on TSMC's 40nm process. I said that I guess that if Intel manufactured an ARM chip on Intel's 32nm LP process with the same die area and power consumption as their x86 chip, the ARM chip would be preferable. Like Anand said, We'll see how this SoC stacks up against multi-core Cortex-A15 chips on TSMC's 28nm process. If Intel changes the priority and makes their Low Power process transform to the next node together with (instead of after) the high-performance process (currently one step ahead at 22nm), then they will be seriously ahead of whoever manufactures ARM chips (TSMC and others). > The instructions that fault are the very rarely used ones They complicate the decoders and take up space and I think take up latency (clocks) during decoding. This costs money even when these instructions are not used. > Escaping ... so I'm not sure what on earth you're talking about REX prefix: http://www.x86-64.org/documentation/assembly.html http://www.x86-64.org/documentation/assembly.html > To say their CPUs are "lackluster CPU design", is pretty ridiculous Their power efficient design is in-order and pretty crap. You should read what Linus Torvalds had to say about it. Yes, Conroe was awesome and Sandy Bridge is awesome, but that is not what we're talking about here.

by berkut 15y ago

wolf550e 15y ago

> Intel's 65nm (Pentium M) can still beat similarly clocked (1.5 Ghz) ARMs at 28nm You can only compare chips that have the same power consumption. A 1w chip against a 45w (or whatever) chip is not a comparison you can make. Specifically, Intel now demonstrates a Penwell SoC with a Saltwell (Atom) core made on Intel's 32nm LP process and it benchmarks well against Cortex-A9 chips made on TSMC's 40nm process. I said that I guess that if Intel manufactured an ARM chip on Intel's 32nm LP process with the same die area and power consumption as their x86 chip, the ARM chip would be preferable. Like Anand said, We'll see how this SoC stacks up against multi-core Cortex-A15 chips on TSMC's 28nm process. If Intel changes the priority and makes their Low Power process transform to the next node together with (instead of after) the high-performance process (currently one step ahead at 22nm), then they will be seriously ahead of whoever manufactures ARM chips (TSMC and others). > The instructions that fault are the very rarely used ones They complicate the decoders and take up space and I think take up latency (clocks) during decoding. This costs money even when these instructions are not used. > Escaping ... so I'm not sure what on earth you're talking about REX prefix: http://www.x86-64.org/documentation/assembly.html http://www.x86-64.org/documentation/assembly.html > To say their CPUs are "lackluster CPU design", is pretty ridiculous Their power efficient design is in-order and pretty crap. You should read what Linus Torvalds had to say about it. Yes, Conroe was awesome and Sandy Bridge is awesome, but that is not what we're talking about here.