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They didn't fail embedded for lack of trying. Their offering needed WAY too much silicon and power to provide the same computing power as a smaller ARM chip.

They didn't fail embedded for lack of trying. Their offering needed WAY too much silicon and power to provide the same computing power as a smaller ARM chip. This may be fundamental to x86 - there's so much cruft in the instruction set that you need a huge chunk of silicon to decode it.

deleted 4y ago
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jiggawatts 4y ago
> x86 - there's so much cruft in the instruction set that you need a huge chunk of silicon to decode it. This is largely a myth. The actual power overhead of the x86 decoder compared to the entire chip is something like 4%, and keep in mind that ARM has a decoder too! I'm not sure what the power requirement of that is, but it has got to be at least 1-2%. Put it another way: if you just look at the logic layout of a modern chip, the 4-8 cores take up a fraction of the total area, and then most of that is the AVX vector units and the cache! The decoders are tiny in terms of area, and chips generally speaking use power roughly proportional to area. People think of Apple's M1 chips as demonstrating ARM's superiority, but in fact that just demonstrates the superiority of TSMC's bleeding-edge process. Current-gen AMD Zen 4 processor cores are faster than M1, and are more power efficient, it's just that they're optimised for desktop PCs instead of laptops. Of course, the ARM architecture does have a few benefits. Chief amongst them is the relaxed memory consistency model, which reduces the overheads of instruction retirement (the "back-end" of processors). This benefit scales with the number of processor cores, but that hasn't seemed to have to stopped both Intel and AMD planning for CPU with over 256 hardware threads anyway in the near future.
- pclmulqdq 4y ago
  You are definitely not thinking with embedded in mind. Everything you said applied perfectly to server chips, but not to the embedded world. The Silicon and power budgets are MUCH tighter and allocated very differently in embedded chips than in server CPUs. Most of the area on those chips isn't cache, or even memory. It's actually mostly peripherals, with significant area spent on the core itself. And there's a lot less Silicon total - a 7x7 mm die (50 square mm) is a huge embedded chip. Silicon spent on cores, even a tiny bit, is functionality your chip doesn't have.

deleted 4y ago

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jiggawatts 4y ago

> x86 - there's so much cruft in the instruction set that you need a huge chunk of silicon to decode it. This is largely a myth. The actual power overhead of the x86 decoder compared to the entire chip is something like 4%, and keep in mind that ARM has a decoder too! I'm not sure what the power requirement of that is, but it has got to be at least 1-2%. Put it another way: if you just look at the logic layout of a modern chip, the 4-8 cores take up a fraction of the total area, and then most of that is the AVX vector units and the cache! The decoders are tiny in terms of area, and chips generally speaking use power roughly proportional to area. People think of Apple's M1 chips as demonstrating ARM's superiority, but in fact that just demonstrates the superiority of TSMC's bleeding-edge process. Current-gen AMD Zen 4 processor cores are faster than M1, and are more power efficient, it's just that they're optimised for desktop PCs instead of laptops. Of course, the ARM architecture does have a few benefits. Chief amongst them is the relaxed memory consistency model, which reduces the overheads of instruction retirement (the "back-end" of processors). This benefit scales with the number of processor cores, but that hasn't seemed to have to stopped both Intel and AMD planning for CPU with over 256 hardware threads anyway in the near future.

pclmulqdq 4y ago
You are definitely not thinking with embedded in mind. Everything you said applied perfectly to server chips, but not to the embedded world. The Silicon and power budgets are MUCH tighter and allocated very differently in embedded chips than in server CPUs. Most of the area on those chips isn't cache, or even memory. It's actually mostly peripherals, with significant area spent on the core itself. And there's a lot less Silicon total - a 7x7 mm die (50 square mm) is a huge embedded chip. Silicon spent on cores, even a tiny bit, is functionality your chip doesn't have.