4 ms·
Yeah, due to the fact they're out-of-order, the A15s will should be back on top. When the Pentium Pro was introduced with OOO pipeline, it got a 20% speed incre
by berkut 15y ago
Yeah, due to the fact they're out-of-order, the A15s will should be back on top. When the Pentium Pro was introduced with OOO pipeline, it got a 20% speed increase over similarly clocked Pentiums.
The issue might be can the A15s keep their pipeline full with such a small cache and memory bandwidth. And how good (if it even has one) is the pre-fetcher?
If the float units can't be given data fast enough, it's not going to matter how fast it is in theory.
- ajross 15y agoNote that OOO isn't a boolean checklist feature. It's a design choice that opens up a ton of optimization possibilities (the obvious big one being the ability to issue instructions around a DRAM load). But you need to dedicate silicon to actually make those work. How big is the register renaming pool? What are the edge cases where OOO doesn't work (flags registers are a big one here). Do the SIMD registers get renamed too, or are they serialized? Lots of questions, with AFAICT no public answers.