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What is a hardware thread? I thought threads were a software abstraction?
by _3u10 4y ago
What is a hardware thread? I thought threads were a software abstraction?
- saagarjha 4y agoMany processors have a feature called SMT that can run multiple "threads" of execution on a core at once: https://en.wikipedia.org/wiki/Multithreading_(computer_architecture) https://en.wikipedia.org/wiki/Multithreading_(computer_archi.... For example, you might schedule another thread to run when waiting for a memory load to complete. On POWER processors you can actually set priorities for these threads, much like you might do for those running in software.
- raverbashing 4y agoI think it's Power's version of SMT (or Hyperthreading as it is known in the Intel world)
- newman314 4y agoPOWER can be configured for SMT4 or SMT8. SMT8 was the default for P9 however, for SAP on P10, it appears that the recommendation is now to use SMT4 instead. Interestingly, Google just found an older comment that I made awhile ago. https://news.ycombinator.com/item?id=30354228 https://news.ycombinator.com/item?id=30354228
- p_l 4y agoPhysically the POWER 8 & 9 chips are build in SMT4 and SMT8 configurations (the resulting dies are slightly different). Then on top of that, you can configure the actual number of SMT from 1 to chip maximum, at runtime.
- mikehollinger 4y ago> What is a hardware thread? I thought threads were a software abstraction? This is a great question! Threads are a programming abstraction, but not just in software. Processors present an "architected state" to the programmer. Internally, the machine itself has a much more complex set of logic managing that presented state. The feature we're talking about here is generally called Simultaneous Multi-threading or SMT.[1] POWER was the first architecture to support this in commercial devices back in 2004.[2] What's important to understand is that the processor core itself is made up of multiple units, each of which have their own internal state, task management, and methods of communication with each other. They don't just run a linear "fetch/decode/execute/store" cycle, even in a pipeline. If you were to do that, you'd end up with an extreme under-utilization of the silicon (or put a different way, someone else would figure out how to get better performance than you). With SMT enabled, multiple real programming threads can execute at the exact time, while the core "figures out" how to share resources between them, increasing the effective throughput of the device at the expense of silicon. With the newest POWER cores you can get up to SMT-8, and (if you want) even tune cores down to SMT-4, SMT-2, or just turn the feature off and dedicate all resources to a single thread while the operating system is running. All of that is presented to the programmer as by way of the architected registers and behaviors in the processor. In reality there's a huge number of other registers and machinery running behind the scenes that isn't visible to user-space, the operating system, or in some cases even the hypervisor (if present). Source: I worked in firmware for a couple of generations of these devices, was lead for a simulator team, and was functional owner for the launch vehicle for POWER7. [1] https://en.wikipedia.org/wiki/Simultaneous_multithreading https://en.wikipedia.org/wiki/Simultaneous_multithreading [2] https://en.wikipedia.org/wiki/POWER5 https://en.wikipedia.org/wiki/POWER5
- LargoLasskhyfv 4y agoThen there is 'microthreading' in hardware, as implemented in an academic proof-of-concept in D-RISC by: http://apple-core.info/ http://apple-core.info/ via many small cores arranged in so called 'microgrids': https://web.archive.org/web/20161121135317/svp-home.org/microgrids https://web.archive.org/web/20161121135317/svp-home.org/micr...