3 ms·
> abstracts over the target CPU, as it exposes to the clients a standardized RISC instruction set inspired by the MIPS and SPARC chips. A-ha-ha, well, it kinda
by Joker_vD 4y ago
> abstracts over the target CPU, as it exposes to the clients a standardized RISC instruction set inspired by the MIPS and SPARC chips.
A-ha-ha, well, it kinda does except that it has restrictions similar to x86 (for ease of implementation?): there are only 6 registers (3 preserved across function calls and 3 that are not), a division instruction can mangle R0 if you don't tell it not to, etc.
How many "compiling one fantasy ISA to another fantasy ISA" can we realistically chain with ease anyhow?
- naasking 4y agoLightning gives you access to the full register set if you want to compile to an ABI of your own design.