4 ms·
I wonder how hardware even handles splitlocking. Do they lock the bus when the fetched prefix matches any of the other prefixed of an atomic instruction? Does t
by sweetjuly 4y ago
I wonder how hardware even handles splitlocking. Do they lock the bus when the fetched prefix matches any of the other prefixed of an atomic instruction? Does this mean you can have benign, possibly even pure ALU, instructions that can trigger a bus lock? That's quite a thorny issue. Quite glad that everyone else has moved of variable length instructions.
- colejohnson66 4y agoThis has nothing to do with variable length instructions. The issue here is that code the patch was designed to slow down… slowed down. Whodathunk? As for your question, the LOCK prefix is only valid with a very select set of instructions. And those have to me of the mem/reg form (memory being read and written). If those conditions are not met, a hardware exception is raised.