I would disagree. At the assembly level, as long as the instruction documents what it does in the oddball cases, it's up to you the programmer to use it correct

I would disagree. At the assembly level, as long as the instruction documents what it does in the oddball cases, it's up to you the programmer to use it correctly. Some CISC CPUs trap on errors like divide-by-zero; RISC instruction sets usually make the choice to define some specific behaviour. (For example on Arm, division by zero will always return a 0 result, and will not trap.) Taking an exception is an expensive business, and if the programmer wasn't expecting it then the result will be no better (program crashes, instead of program hangs).