3 ms·
~ 10% $ of Xilinx demo boards. Curious: Is there a "Ferrari" general RISC-V ISA shorthand or CPU implementation with more extensions including Q B V K H & S ?
by sacnoradhq 4y ago
~ 10% $ of Xilinx demo boards.
Curious: Is there a "Ferrari" general RISC-V ISA shorthand or CPU implementation with more extensions including Q B V K H & S ?