3 ms·
Aren't NaN-based operations computationally risky? Per Anger Fog's instruction latency guides, several microarchitectures seem to process NaNs and denormals th
by Majromax 4y ago
Aren't NaN-based operations computationally risky? Per Anger Fog's instruction latency guides, several microarchitectures seem to process NaNs and denormals through a slow, microcoded path rather than the fast FPU/vector path. Saving a few instructions on boxing/unboxing might be a false economy if it comes at the cost of a hundred cycles in microcode latency.
- moonchild 4y agoRecent uarchs take no penalty for denormals and nans.
- ridiculous_fish 4y agoThis is a valid observation. Most NaN-tagging schemes only perform arithmetic once the values are determined to not be NaN, and so avoid any penalty. In this scheme always perform arithmetic on NaNs, so if the uarch imposes a penalty it will be hit every op.