4 ms·

I would be curious to see if this was actually faster in practice. It is less instructions, but I would expect that the use of vector registers would negate tha

I would be curious to see if this was actually faster in practice. It is less instructions, but I would expect that the use of vector registers would negate that.

pkhuong 4y ago
On x86-64, all floating point arithmetic uses vector register, and there is no difference in latency or throughput between scalar and 128-bit SIMD arithmetic; in fact, scalar instructions can easily introduce performance issues because they leave the high bits of the registers untouched (i.e., introduce useless partial dependencies).
- moonchild 4y ago
  > scalar instructions can easily introduce performance issues because they leave the high bits of the registers untouched (i.e., introduce useless partial dependencies) How's that? SSE scalar ops are all two-address, so they depend on the destination regardless. And AVX scalar ops are three-address, but zero the high bits of the register. Where you run into trouble is mixing sse with avx, as you can end up in the dirty high half state; but that can happen with vector or scalar ops.