Ref: "How to take advantage of partial reconfiguration in FPGA designs" https://www.eetimes.com/how-to-take-advantage-of-partial-reconfiguration-in-fpga-designs

Ref: "How to take advantage of partial reconfiguration in FPGA designs" https://www.eetimes.com/how-to-take-advantage-of-partial-reconfiguration-in-fpga-designs/ https://www.eetimes.com/how-to-take-advantage-of-partial-rec... That capability is called "partial reconfiguration" and is pretty common. Your description sounds like you would like to reconfigure the FPGA at a finer grain level than what "partial reconfig" does. Also, FPGA internals (WRT configuration) are typically undocumented and often proprietary, so having the FPGA self-generate FPGA configurations is going to be difficult unless the FPGA in question is well documented. Using the FPGA to reconfigure itself might be tricky since FPGAs are typically loaded by an external source. Theoretically, you could generate the new configuration, write it to an external memory (e.g. RAM), and then use the FPGA load-from-memory capability to do what you ask. There is a wide gap between theory and practice here, however. By the time you implement configuration generation and reloading in an FPGA, you probably will be out of room in the FPGA. :-/