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It's exciting that Google specifically requires memory tagging support and the J extension (Standard Extension for Dynamically Translated Languages) from RISC-V
by mepian 4y ago
It's exciting that Google specifically requires memory tagging support and the J extension (Standard Extension for Dynamically Translated Languages) from RISC-V processors that are going to run Android: https://youtu.be/70O_RmTWP58?t=651 https://youtu.be/70O_RmTWP58?t=651
- snvzz 4y agoDefining the requirements is one point, one task in that list. Developing J is another. Note that J is not a ratified extension, or even close to being so. It has been moving slowly for years (been a low priority), and now it is finally getting some attention, as higher priority items (such as H, B, V and Zc) are either done or final stages.
- viraptor 4y agoCould Google pull another QUIC here? "Here's a thing we implemented and deployed, wanna polish it up and call http2?" (Yes, I'm ignoring nuance here)
- pjmlp 4y agoThere is also "Member Day Session: J Extension Group Meeting" https://www.youtube.com/watch?v=0EEzXsA--9Y https://www.youtube.com/watch?v=0EEzXsA--9Y
- bloopernova 4y agoNot a hardware/chip person here, so I found this text helpful regarding memory tagging: "As one might expect, the Arm64 architecture uses 64-bit pointers to address memory. There is no need (yet!) for an address space that large, though, so normally only 48 of those bits are actually used by the hardware." ... "MTE allows the storage of a four-bit "key" in bits 59-56 of a virtual address — the lower "nibble" of the top byte. It is also possible to associate a specific key value with one or more 16-byte ranges of memory. When a pointer is dereferenced, the key stored in the pointer itself is compared to that associated with the memory the pointer references; if the two do not match, a trap may be raised." From this article at the ever-wonderful lwn.net: https://lwn.net/Articles/834289/ https://lwn.net/Articles/834289/