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So I don’t understand any of this stuff. But does this mean applications built for ARM64. Like a .NET 7 app which targets linux-arm64 and runs on… say Ubuntu AR
by philliphaydon 4y ago
So I don’t understand any of this stuff. But does this mean applications built for ARM64. Like a .NET 7 app which targets linux-arm64 and runs on… say Ubuntu ARM. Will run on a RISC-V cpu?
- snvzz 4y ago>dotnet Is the single remaining major runtime that's still not ported to RISC-V. Therefore, the answer is: Not yet.
- philliphaydon 4y agoHahaha ok. But I could use rust or go without (or without much) issue? I was worried this might be something we have to wait another 5 years for decent support for but it sounds like it’s quite widely supported now which is awesome!
- snvzz 4y agoYes, Rust has been ported for a while. It's fine. Keep in mind, there is already 95%+ of Debian's package library, and that's the Linux distribution with the largest package library. On the topic of Rust, oreboot runs in multiple RISC-V boards. That's Rust running right from power-on/reset.
- HideousKojima 4y agoTechnically Mono supports RISC-V, so you can get .NET code running on it. Also it looks like if you're willing to go through messy and poorly documented build processes you can build CoreCLR on RISC-V: https://github.com/dotnet/runtime/issues/36748 https://github.com/dotnet/runtime/issues/36748 So proper support is likely coming soonish, I'd guess by the time .NET 8 or 9 comes out.
- themerone 4y agoRisc-V is an completely different instruction set from ARM. Risc-V is no more compatible with ARM than ARM is with Intel.
- mark-r 4y agoApple's ARM is more compatible with Intel than you'd expect. https://news.ycombinator.com/item?id=33635720 https://news.ycombinator.com/item?id=33635720
- vineyardmike 4y agoApplications built for one don’t automatically run on others the way intel/amd have parity for a x86 processor. It is still a different architecture so you still need to compile for RISCV.
- philliphaydon 4y agoYeah so for .NET I target win-x64 or linux-x64 or linux-arm64, but I guess .NET needs some linux-riscv or equiv.
- preisschild 4y agoYup. In Go the target is called `riscv64`. But someone could come up with a translator which compiles arm64 or amd64 binaries into riscv64, similar to how Apple's Rosetta2 and box64 does it for arm.
- raincom 4y agoOr one can come up with Rosetta 2 like solution until all binaries are ready for risc.
- magicalhippo 4y agoRISC is just a broad categorization of the instruction set, based on some of its defining properties. The actual instruction sets are not compatible: they both have different instructions, different ways of encoding instructions and so on. It's a bit like an AK-74 and an AR-15. Both are classified as assault rifles based on some defining properties, but they're designed and built completely different, so you can't take say a full magazine from an AK-74 and make it work in an AR-15. So no, you won't be able to take your ARM binary and run it unaltered on a RISC-V core.
- snvzz 4y ago>So no, you won't be able to take your ARM binary and run it unaltered on a RISC-V core. There's still emulation, which will run your unaltered ARM binary... with the corresponding performance penalty, which could either be acceptable or not for the intended purpose.
- anamexis 4y agoWould ARM on RISC-V emulation have lower overhead than, say, x86-64 on ARMv8? I would imagine the common RISC stuff would be beneficial there, but I know next to nothing about CPU architecture.
- raincom 4y agoThere is a penalty for translating arm instructions into risc on the fly. That can be compensated by faster risc cores.
- brucehoult 4y agoNo. Both x86 and ARM are very expensive to emulate on another ISA, primarily because of the intricate details of updating their respective status registers / condition codes after each instruction. In an emulator, getting that right takes a lot more work than doing the actual add or xor or whatever the instruction appears to do. RISC-V on the other hand is very easy to emulate at high performance because it doesn't have condition codes at all. Rather than doing something like "cmp A,B;blt foo" as x86 and ARM do (with the result of the cmp stored in the condition codes), the equivalent RISC-V code is "blt a,b,foo".
- prabhu-yu 4y agoDo not worry too much on running ARM or x86-64 or mips binary on RISC-V. You will soon start cross compiling the source code to the target architecture. Running the binary of other arch to another is temporary solution. Rather we need to think on what RISC-V enables us compared to ARM?