>At some point, Intel implemented consistency between cached instructions and memory. This ensures that self-modifying code will run the latest version of an in

>At some point, Intel implemented consistency between cached instructions and memory. This ensures that self-modifying code will run the latest version of an instruction rather than a stale instruction in the cache. I couldn't determine exactly when this was implemented; various sources say the 486, the Pentium, or the Pentium Pro. (If you have a definitive answer, please let me know.) It's definitely not the case on the 486, the linked HN post written by me was incorrect about that. Tried running self-modifying code on a 486 and it required a jump to make it work.