4 ms·

40 years ago memory was faster than the CPU, so using the stack to hold operands incurred no speed penalty. More important now is that registers are global res

40 years ago memory was faster than the CPU, so using the stack to hold operands incurred no speed penalty. More important now is that registers are global resources, and global resources are a nightmare in multi-threaded code. Stack machines don't have global resources (except a stack pointer and ALU which are easy to manage). But then CPU and registers got fast and register machines began to predominate. Now you have to deal with the register allocation nightmare because registers are essentially global variables. Java takes the approach of presenting a stack machine with no registers and then letting the interpreter figure out register allocations at run time (or nearly so). Life would be simpler if we had 1000 simple cores, each with their own small private set of registers, and they communicated by message passing. I.E. the Actor model in hardware.

philipswood 4y ago
I agree so much with: > Life would be simpler if we had 1000 simple cores, each with their own small private set of registers, and they communicated by message passing. I.E. the Actor model in hardware. But more cores. (And the message passing and routing implemented in hardware of course.)
cesaref 4y ago
The thing is, that exact approach was tried in the 80s with the transputer (https://en.wikipedia.org/wiki/Transputer https://en.wikipedia.org/wiki/Transputer) and it's a very compelling computation model, as you've pointed out. However, what was discovered was that programming the machines and the analysis required to produce code that communicated that way was hard, with specialist languages like occam (https://en.wikipedia.org/wiki/Occam_(programming_language) https://en.wikipedia.org/wiki/Occam_(programming_language) being required, and all sorts of scaling issues appearing. As a student during this period, I learnt occam and wrote stuff for various transputer development boards. The basic principles live on in the XMOS processors which have found a niche in signal processing applications (https://en.wikipedia.org/wiki/XMOS https://en.wikipedia.org/wiki/XMOS) although there may be other applications i'm unaware of that has also adopted the idea.
agumonkey 4y ago
I'm still surprised GreenArray forth cpu matrix didn't have a come back yet. cores could send and receive forth words/subprograms from neighbors, they had a bit of memory.. it's like a unified highlevel metaprogrammable memoryprocessor, that only consume minute amounts of power (and is async IIRC). it really tickles my brain in wild ways. https://duckduckgo.com/?q=ga144+cpu&t=ffab&ia=web https://duckduckgo.com/?q=ga144+cpu&t=ffab&ia=web
bjconlan 4y ago
Isn't this where Mr Moore's (of Forth fame) cpu designs have gone? (see https://www.greenarraychips.com https://www.greenarraychips.com). Ok maybe not the 'actor' model per say (unless actor channels are thought of core interconnects (I think there is also a global state but I cant remember much of these details at the moment without re-watching the linked strangloop vid.) https://www.youtube.com/watch?v=0PclgBd6_Zs&t=2s https://www.youtube.com/watch?v=0PclgBd6_Zs&t=2s or https://news.ycombinator.com/item?id=22021262 https://news.ycombinator.com/item?id=22021262 is probably the best for groking
ilyt 4y ago
> Life would be simpler if we had 1000 simple cores, each with their own small private set of registers, and they communicated by message passing. I.E. the Actor model in hardware. Not for the developers. Also good luck making that secure in hardware. The big fat core model is always easier to program for
quadhome 4y ago
Isolate the cache (no MESI) and we have that now, with dozens to hundreds of cores. Frequency scaling remains dead, so we’ll get all those cores, slowly but surely.

philipswood 4y ago

I agree so much with: > Life would be simpler if we had 1000 simple cores, each with their own small private set of registers, and they communicated by message passing. I.E. the Actor model in hardware. But more cores. (And the message passing and routing implemented in hardware of course.)

cesaref 4y ago

The thing is, that exact approach was tried in the 80s with the transputer (https://en.wikipedia.org/wiki/Transputer https://en.wikipedia.org/wiki/Transputer) and it's a very compelling computation model, as you've pointed out. However, what was discovered was that programming the machines and the analysis required to produce code that communicated that way was hard, with specialist languages like occam (https://en.wikipedia.org/wiki/Occam_(programming_language) https://en.wikipedia.org/wiki/Occam_(programming_language) being required, and all sorts of scaling issues appearing. As a student during this period, I learnt occam and wrote stuff for various transputer development boards. The basic principles live on in the XMOS processors which have found a niche in signal processing applications (https://en.wikipedia.org/wiki/XMOS https://en.wikipedia.org/wiki/XMOS) although there may be other applications i'm unaware of that has also adopted the idea.

agumonkey 4y ago

I'm still surprised GreenArray forth cpu matrix didn't have a come back yet. cores could send and receive forth words/subprograms from neighbors, they had a bit of memory.. it's like a unified highlevel metaprogrammable memoryprocessor, that only consume minute amounts of power (and is async IIRC). it really tickles my brain in wild ways. https://duckduckgo.com/?q=ga144+cpu&t=ffab&ia=web https://duckduckgo.com/?q=ga144+cpu&t=ffab&ia=web

bjconlan 4y ago

Isn't this where Mr Moore's (of Forth fame) cpu designs have gone? (see https://www.greenarraychips.com https://www.greenarraychips.com). Ok maybe not the 'actor' model per say (unless actor channels are thought of core interconnects (I think there is also a global state but I cant remember much of these details at the moment without re-watching the linked strangloop vid.) https://www.youtube.com/watch?v=0PclgBd6_Zs&t=2s https://www.youtube.com/watch?v=0PclgBd6_Zs&t=2s or https://news.ycombinator.com/item?id=22021262 https://news.ycombinator.com/item?id=22021262 is probably the best for groking

ilyt 4y ago

> Life would be simpler if we had 1000 simple cores, each with their own small private set of registers, and they communicated by message passing. I.E. the Actor model in hardware. Not for the developers. Also good luck making that secure in hardware. The big fat core model is always easier to program for

quadhome 4y ago

Isolate the cache (no MESI) and we have that now, with dozens to hundreds of cores. Frequency scaling remains dead, so we’ll get all those cores, slowly but surely.