It's not that simple. Large SRAM arrays have the same problems that DRAM has: how much charge do you need to drive into the row and column lines to select the

It's not that simple. Large SRAM arrays have the same problems that DRAM has: how much charge do you need to drive into the row and column lines to select the cell you actually want to have active. You can't push it too high because then power consumption goes bonkers. You can't make the wires too small because then they can't pass the power required to drive the entire array. In short, hardware is hard with designers needing to make crazy multidimensional tradeoffs.