5 ms·
Under the "What About HyperThreading?" section the author states: >"Ironically, a large motivation behind SMT is likely the need to improve single threaded pe
by bogomipz 4y ago
Under the "What About HyperThreading?" section the author states:
>"Ironically, a large
motivation behind SMT is likely the need to improve single threaded performance. Doing so involves targeting higher performance per clock with wider and deeper cores. But scaling width and reordering capacity runs into increasingly diminishing returns"
Cam someone what is meant here by "scaling width"? Is width the number of hardware threads on a chip? Also does this directly relate to "reordering capacity"? If so how?
- wmf 4y agoWidth here means the number of instructions that can be executed in parallel. Reordering capacity, also called instruction window depth, is orthogonal (although the area of the reorder buffer is proportional to width x depth).
- titzer 4y ago(although the area of the reorder buffer is proportional to width x depth). No, the reorder buffer size is proportional to the number of μ-ops, it does not depend on the number of execution ports.
- monocasa 4y agoI think what the parent is hinting at is that the ROB isn't typically a simple linear array of uops, but instead generally a 2D array. You normally have each line in a ROB being a handful of instructions that can be issued without dependencies, and normally has interesting constraints like only one branch per line. The number of uops normally listed as the ROB size generally is if you can achieve perfect packing per line, but it's hard to get at the specifics from micro benchmarks because you normally hit other bottlenecks first if the the ROB engineers did a great job.