5 ms·

Nothing about this seems, on first glance, to be anything at all specific to RISC-V. Should I be looking more closely for what is unique to RISC-V?

• vardump 4y ago
  It's good to see something about this, because interrupts etc. have been a bit of a dark corner when it comes to RISC-V. Even better to hear there's nothing that specific.
  • snvzz 4y ago
    >because interrupts etc. have been a bit of a dark corner when it comes to RISC-V. Interrupts and timers are actually codified in the specifications, unlike most other ISAs.
    • ajross 4y ago
      x86 APIC/TSC is actually very well specified. As is older stuff like HPET. Even the original IBM PC PIT had a clean datasheet and documented board integration.
      • snvzz 4y ago
        Yes, and that's unlike ARM or MIPS. RISC-V and OS-A 22 platform are different than x86 & the IBM PC platform in that it has put effort into ensuring these things are standardized from the very start.
• deleted 4y ago
  [deleted]