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Accelerating zk-SNARKs - MSM and NTT algorithms on FPGAs with Hardcaml
- gaudat 4y ago*Zero knowledge crypto acceleration with FPGA
- deleted 4y ago[deleted]
- drewcoo 4y agotitle: Accelerating zk-SNARKs - MSM and NTT algorithms on FPGAs with Hardcaml Any reason the title deviates so much from original? Is it because of all the cool acronyms and code words? Here's a decoder: zk-SNARK: zero-knowledge Succinct Non-Interactive Argument of Knowledge MSM: Multi-Scalar Multiplication Hardcaml: OCaml lib for hardware: https://github.com/janestreet/hardcaml https://github.com/janestreet/hardcaml NTT: Number Theoretic Transform
- jamespwilliams 4y agohttps://signalsandthreads.com/programmable-hardware/ https://signalsandthreads.com/programmable-hardware/ and https://www.youtube.com/watch?v=X1cgRXhpQLY https://www.youtube.com/watch?v=X1cgRXhpQLY are worth a listen if you’re interested in hardcaml (they’re both with the author of this article) - I’m not a hardware person by any means, but still found both interesting.
- FranGro78 4y agoAny suggestions for resources to get an understanding of the mathematics etc behind cryptography in general, and the ZK space?
- mattdesl 4y agoLots of resources here: https://github.com/matter-labs/awesome-zero-knowledge-proofs https://github.com/matter-labs/awesome-zero-knowledge-proofs
- ecesena 4y agoSpecifically on MSM, you can check these out. The channels also have a lot more on ZK. https://youtu.be/Bl5mQA7UL2I https://youtu.be/Bl5mQA7UL2I https://youtu.be/aZ3CzKZBK38 https://youtu.be/aZ3CzKZBK38
- fyquah 4y agohttps://zprize.hardcaml.com https://zprize.hardcaml.com contains a detailed technical write-up, which includes an overview of the MSMs and NTTs algorithms, some well-known methods to accelerate them (Pippenger's algorithm, Cooley-Tukey etc.) and a description of our implementation. All code is open source! - https://github.com/fyquah/hardcaml_zprize https://github.com/fyquah/hardcaml_zprize (Disclaimer: I'm one of the authors of the above blogpost) (Edit: Added link to source code)
- supahfly_remix 4y agoI looked at simple examples (counters, fibonacci generator) of hardcaml in the github repo, but I don't see any obvious advantages over systemverilog, verilog, or VHDL (the industry standard languages). Why would one use hardcaml over these?
- jadbox 4y agoBut does VHDL work for FPGA?
- supahfly_remix 4y agoYes
- mijoharas 4y agoFrom the article: > We believe by using Hardcaml we were able to more efficiently and robustly come up with designs in the short competition period So, the authors seem to believe they are more productive in it than other languages, and seem to be positioning it as a competitive advantage.
- supahfly_remix 4y agoWhat abstractions does Hardcaml provide that makes them believe they are more productive in it?
- JanisErdmanis 4y agoThe assumption of a trusted setup phase makes zkSNARKs somewhat obscure to use. Definitely, it does not fit for making evidence for voting where an adversary could have rigged a setup phase allowing to issue votes as sees fit.
- PretzelPirate 4y agoYou can include a very large set of people in the trusted setup, and if even one of them destroys their key the system is safe. So far, there have been ceremonies which invite anyone to join who wants to, and anyone who participated and destroyed their own key knows that the trusted setup isn't compromised. An entire community could participate for their local votes and they could each destroy their own key in order to have confidence in the result.
- JanisErdmanis 4y agoInteresting. I am concerned, however, that those ceremonies would not be protected against sabotage. For instance, if a few participants decide not to follow the protocol, the ceremony would need to be restarted. A question then, would the dishonest parties could be identified? That can be used as a reason in the face of security to limit who could join and in that way, sabotage the ceremony. > An entire community could participate for their local votes and they could each destroy their own key in order to have confidence in the result. Two problems. Dishonest voters spoil the process. Synchronically running multiparty ceremony between all participants at the same time (what if the voter could not make it, what if the server gets a DDOS attack in the process).
- latchkey 4y agoi have run large data centers with over 120,000 gpus... one thing that i learned in this process is that running hardware at scale and efficiency is very very difficult. it requires a lot of process and tooling to automate everything. if anyone here has run FPGA's specifically, at this sort of scale, i'd love to talk to them.