There's typically a "real[1]" 8042, but with an optional chipset configuration register that diverts accesses to it to SMM instead, even on modern chipsets [1]

There's typically a "real[1]" 8042, but with an optional chipset configuration register that diverts accesses to it to SMM instead, even on modern chipsets [1] Obviously not actually an 8042, but some hardware that would decode those addresses if they weren't trapped beforehand