Oh wow. I had thought this was, "I simulated it in a high level HDL and synthesized it to gates". No, this is... I built it with physical chips. Brilliant bui

Oh wow. I had thought this was, "I simulated it in a high level HDL and synthesized it to gates". No, this is... I built it with physical chips. Brilliant build and write-up! Edit: This is beautiful for a second reason... The lack of regard for doing things "correctly". The ugly clock circuit is horrifically unreliable... But just reliable enough for it to still work. It reminds me of Muntzing. https://en.wikipedia.org/wiki/Muntzing https://en.wikipedia.org/wiki/Muntzing