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A lot of those risks would be risks before there was Linux, GCC, and the plethora of open source tools. There's working RISC-V emulators running Linux with too
by tenebrisalietum 4y ago
A lot of those risks would be risks before there was Linux, GCC, and the plethora of open source tools. There's working RISC-V emulators running Linux with toolchains now, and there isn't even any real RISC-V hardware you can get yet beyond some demo boards, etc.
> whether it will evolve and innovate
CPU evolution and innovation is driven by the transistors beneath the ISA, not the ISA. For Intel, MMX/SEE and all the SIMD stuff was an innovation and something new, but the instructions that use it are really not that big of a deal in and of themselves. When some other capability arises in CPUs, any ISA will simply get new instructions.
- brookst 4y agoFair enough. For a startup considering committing to an ISA for low level development, would you say RISC-V is no riskier (har) than ARM? Despite, as you say, very little HW being available?
- Gordonjcp 4y agoRealistically how many products are going to be reliant on the development team writing bare assembly?
- the_duke 4y ago> there isn't even any real RISC-V hardware you can get yet beyond some demo boards, etc. I assume you mean Linux-capable hardware. The Risc-V foundation claims that over 10 Billion chips have already been produced.