It’s synchronous but it was offloaded on to the southbridge in Intel/AMD CPUs so you could fill a ring buffer and it’d DMA everything to the peripheral without

It’s synchronous but it was offloaded on to the southbridge in Intel/AMD CPUs so you could fill a ring buffer and it’d DMA everything to the peripheral without interrupting the CPU. Drivers could just leisurely fill up those ring buffers and never have to worry about kernel scheduling inhibiting hard realtime. As an input the interrupt could also drop into a driver much faster than userland software. CNCs with MachCNC software and lots of old industrial equipment operated this way since it saved money on custom PCB designs. BART [1] still buys older motherboards with parallel ports wired to the south bridge because USB adaptors can’t guarantee timing and swapping to a PCIe card would require rewriting some old stuff. However it has to be done at the driver level, it wasn’t Postscript or GCode or something like that, so I doubt this piece of gear will be anywhere as useful as parallel ports used to be. [1] https://news.ycombinator.com/item?id=32884814 https://news.ycombinator.com/item?id=32884814