3 ms·
1) Yes, cache, though it was specifically the introduction of split instruction/data caches. Modern processors are basically Harvard architecture internally, h
by retrac 4y ago
1) Yes, cache, though it was specifically the introduction of split instruction/data caches. Modern processors are basically Harvard architecture internally, handling instructions and data separately to allow them to be processed in parallel. So either explicit instructions (RISC approach) or extensive tracking of cache entries (CISC approach) must be used to ensure that data cache changes are propagated to the instruction cache.
2) It greatly complicates things in terms of software engineering. It's bad practice unless strictly necessary. Code that rewrites itself is very hard to debug, trace and just generally work with, compared to immutable blocks of read-only code. Most high-level languages don't expose anything except function pointers in terms of self-modification, so compiled output would rarely need SMC. (Though it may be faster to emit SMC to implement high-level constructs, in some edge cases.)
The hardware doesn't like it and maintainers, managers, and most professors don't like it, either.