2 ms·

Rotate through carry works for that. (Maybe not on RISC-V, it’s kind of picky about things you can’t easily access in high-level languages.) Unsigned floored, x

Rotate through carry works for that. (Maybe not on RISC-V, it’s kind of picky about things you can’t easily access in high-level languages.) Unsigned floored, x86: add eax, ebx rcr eax, 1 ARM: adds r0, r0, r1 rrx r0, r0 I’d need to think a bit more to come up with a signed version.

rep_lodsb 4y ago
>I’d need to think a bit more to come up with a signed version. Invert the high bits, turning two's complement into biased format (0 = lowest negative number, 0xFF...F = highest positive number). Then do the add+rotate and convert the result back.