I'm guessing it's because of memory access. The 6510 processor can accesses memory only on every other clock cycle. So half of all clock cycles can be used by

I'm guessing it's because of memory access. The 6510 processor can accesses memory only on every other clock cycle. So half of all clock cycles can be used by the VIC to get display data out of memory, without fearing contention with the CPU. But this means that pixels must be output at the rhythm of the processor's clock. If you wanted to make the pixels 10% wider, you'd have to slow down the clock driving the VIC, but then it wouldn't be able to interleave memory access with the processor anymore. Not entirely sure this is the true reason since my knowledge is patchy, but it's my guess.