4 ms·
An intellectually interesting exercise would be to replace all of the logic by a 64bx16b EPROM which loops back onto itself through 2 8b latches. This is possib
by childintime 4y ago
An intellectually interesting exercise would be to replace all of the logic by a 64bx16b EPROM which loops back onto itself through 2 8b latches. This is possible as the architecture has only 16 bits of state (4b accumulator + 12b PC). This simplifies the hardware, which is nice, but it also makes it a software defined MCU, hence the student could go on to define his own instructionset. Now that would be instructive.
- omgtehlion 4y agoIf you look closer, this CPU _is_ actually some roms sandwiched between registers. All the logic remaining are bus arbiters and IO access. You can replace 74-181 with one more rom though, but it will not decrease chip count... EDIT: actually if you replace 74*181 with rom, you can get rid of NZERO flag detection gates (minus 1 chip)...