3 ms·

> the 250 kHz bit stream (which for physics reasons can't be the raw bit pattern the user wants to store) Technically it's more reliability/engineering reasons

by a1369209993 4y ago

> the 250 kHz bit stream (which for physics reasons can't be the raw bit pattern the user wants to store) Technically it's more reliability/engineering reasons. Physics doesn't care (you can basically write whatever bit pattern you like), but if there are more than two consecutive zeroes in the raw bitstream, the timing hardware can potentially be unsure if it was supposed to be three zeroes or four.

ajross 4y ago
That's true, but there's also a minimum limit. Put the flux transitions too close to each other and they'll disappear (the iron in the middle will reorient). Also it's not just clock timing that is a problem, the differential amplifier circuit used is a feedback thing. If it doesn't get input for long enough, it will start amplifying noise in the environment (devices with motors have a LOT of noise) and generate false pulses with essentially random timings. This was the source of "weak sectors" used in copy protection: you'd use special hardware to essentially erase a region in the middle of the sector, and the drive would report a bunch of 1's anyway, but never the same bits twice. Consumer drives couldn't reproduce that behavior, they only knew how to write "correct" bit patterns with clock bits. In practice, the media of the time could handle flux transitions as close as 4us (on a 300RPM drive) or as far apart as ~12 (though only Apple was that brave, because they had a self-clocking circuit, other vendors stuck to 8us. MFM encodings would soon push that back up to 12, and eventually the "HD" encodings would double the clock rate to 2-6us (but they didn't use the extra time otherwise, RLL was only ever deployed on fixed media).
- a1369209993 4y ago
  > Put the flux transitions too close to each other and they'll disappear Sure, but that's below the bit pattern. For the bit stream, flux transitions can never be closer together than two consecutive one bits, which is fine and happens all the time (at least for the media GCR applies to; there are other encoding that have a minimum number of zeroes between ones in addition to a maximum). > the differential amplifier circuit used is a feedback thing. If it doesn't get input for long enough, it will start amplifying noise in the environment Fair point, although I'd still call that a engineering issue rather than a physics one - you can write a "weak sector" to disk, and in principle read it back, it's just that the hardware in 1541 isn't up to the task, for legitimate engineering reasons but not beacause it's physically impossible.
  - ajross 4y ago
    > For the bit stream, flux transitions can never be closer together than two consecutive one bits, For the GCR encoding here, yes (also FM and Apple's GCR). But MFM ("double density") was contemporary, in use on the same media, based on a doubled sampling rate and a minimum of two sampling clocks between flux transitions. A bunch of logic ones there is encoded "101010101010..." (and zeros would be "0101010101...", etc...). Fancier RLL hard drive controllers woulds soon push that to a minimum of three, too. (And surely higher, but by that point the flux encoding had become a trade secret behind interfaces like SCSI or ATA, so it was never documented). "It's complicated", basically
    - a1369209993 4y ago
      > For the GCR encoding here, yes > > (at least for the media GCR applies to; there are other encoding that have a minimum number of zeroes between ones in addition to a maximum).

ajross 4y ago

That's true, but there's also a minimum limit. Put the flux transitions too close to each other and they'll disappear (the iron in the middle will reorient). Also it's not just clock timing that is a problem, the differential amplifier circuit used is a feedback thing. If it doesn't get input for long enough, it will start amplifying noise in the environment (devices with motors have a LOT of noise) and generate false pulses with essentially random timings. This was the source of "weak sectors" used in copy protection: you'd use special hardware to essentially erase a region in the middle of the sector, and the drive would report a bunch of 1's anyway, but never the same bits twice. Consumer drives couldn't reproduce that behavior, they only knew how to write "correct" bit patterns with clock bits. In practice, the media of the time could handle flux transitions as close as 4us (on a 300RPM drive) or as far apart as ~12 (though only Apple was that brave, because they had a self-clocking circuit, other vendors stuck to 8us. MFM encodings would soon push that back up to 12, and eventually the "HD" encodings would double the clock rate to 2-6us (but they didn't use the extra time otherwise, RLL was only ever deployed on fixed media).

a1369209993 4y ago
> Put the flux transitions too close to each other and they'll disappear Sure, but that's below the bit pattern. For the bit stream, flux transitions can never be closer together than two consecutive one bits, which is fine and happens all the time (at least for the media GCR applies to; there are other encoding that have a minimum number of zeroes between ones in addition to a maximum). > the differential amplifier circuit used is a feedback thing. If it doesn't get input for long enough, it will start amplifying noise in the environment Fair point, although I'd still call that a engineering issue rather than a physics one - you can write a "weak sector" to disk, and in principle read it back, it's just that the hardware in 1541 isn't up to the task, for legitimate engineering reasons but not beacause it's physically impossible.
- ajross 4y ago
  > For the bit stream, flux transitions can never be closer together than two consecutive one bits, For the GCR encoding here, yes (also FM and Apple's GCR). But MFM ("double density") was contemporary, in use on the same media, based on a doubled sampling rate and a minimum of two sampling clocks between flux transitions. A bunch of logic ones there is encoded "101010101010..." (and zeros would be "0101010101...", etc...). Fancier RLL hard drive controllers woulds soon push that to a minimum of three, too. (And surely higher, but by that point the flux encoding had become a trade secret behind interfaces like SCSI or ATA, so it was never documented). "It's complicated", basically
  - a1369209993 4y ago
    > For the GCR encoding here, yes > > (at least for the media GCR applies to; there are other encoding that have a minimum number of zeroes between ones in addition to a maximum).