Corollary to this, I dunno if the IOMMU can be used for PCIE mmio spaces ("BARs"), and why not even the PCI configuration spaces which, I guess on x86_64, shoul

Corollary to this, I dunno if the IOMMU can be used for PCIE mmio spaces ("BARs"), and why not even the PCI configuration spaces which, I guess on x86_64, should be "moveable" via MSR regs, certainly specific to the vendor, AMD or Intel modulo some constraints (must be backed by memory or must not, etc).