2 ms·
Nonblocking assignments in hardware description languages (like Verilog or VHDL) work a lot like this. For example always @(posedge clk) begin A <= B; B <
by not2b 4y ago
Nonblocking assignments in hardware description languages (like Verilog or VHDL) work a lot like this.
For example
always @(posedge clk) begin
A <= B;
B <= A;
end
swaps A and B on each positive clock edge.
- aappleby 4y agoAuthor here, you are correct. Implementing non-blocking assignment semantics in C++ is hard and can't really be done cleanly from within the language. Metron (the C++ to Verilog translator) relies on static analysis to prove that C-style assignments to non-local variables in a C++ program have the same semantics as if they were non-blocking assignments. MetroC will extend this with the '@' operator to allow for real non-blocking assignments in code that otherwise looks like regular imperative C.