4 ms·
But you aren't actually mixing data here, right? Even though foo and bar could be on the same cache-line, the threads need to read/write either foo OR bar, so t
by vouwfietsman 4y ago
But you aren't actually mixing data here, right? Even though foo and bar could be on the same cache-line, the threads need to read/write either foo OR bar, so the respective core caches being out of sync for the var they don't use does not really cause any safety issues. Maybe I'm missing the point of your example.
No idea how these two separate cache lines get merged to main memory in the end though, is there some kind of write mask for that?
Also I imagine them being in the same struct is really just an implementation detail and shouldn't actually influence the memory safety?