No question, but: "Though the group tested the technique on a chip made using a 16-nanometer process technology, it will be able to comfortably handle those ma

No question, but: "Though the group tested the technique on a chip made using a 16-nanometer process technology, it will be able to comfortably handle those made using the new 7-nanometer process technology, where the minimum distance between metal lines is around 35 to 40 nanometers." The discernible feature size required for imaging CPUs of 6502 or even 8086 vintage is much lower than that. The latter was apparently made with a 3 µm process, so barring any differences in process naming since, that's about 3 orders of magnitude less. Plus, as Ken's article says, the 8086 has only one metal layer instead of a dozen. So my (still ignorant) hope is that you maybe don't need a synchrotron for that.