3 ms·
I was thinking of this from the perspective of CPU pipeline pressure, but in reality it seems prosessors are indeed smart enough to avoid burdoning the ALUs exe
by nixpulvis 4y ago
I was thinking of this from the perspective of CPU pipeline pressure, but in reality it seems prosessors are indeed smart enough to avoid burdoning the ALUs execution with these kinds of special cases.
Read more here https://stackoverflow.com/questions/17981447/microarchitectural-zeroing-of-a-register-via-the-register-renamer-performance-v/18027854#18027854 https://stackoverflow.com/questions/17981447/microarchitectu...
> [...] these zeroing instructions extremely efficient, with a throughput of four zeroing instructons per clock cycle.
Also, the xor instruction takes up the smallest amount of .text space (right?).
- scheme271 4y agoThe xor reg, reg is also special cased because it's a quick way for compilers to reinitialize a register and indicate that future uses of that register don't depend on any previous operations. It helps the cpu to parallelize any future instructions that use that register since the cpu knows that those instructions don't depend on anything that happens before the the xor.
- Someone 4y agoIt’s not special cased because it's a quick way for compilers to reinitialize a register and indicate that future uses of that register don't depend on any previous operations, it’s special cased to give compilers a quick way to reinitialize a register and indicate that future uses of that register don't depend on any previous operations. https://randomascii.wordpress.com/2012/12/29/the-surprising-subtleties-of-zeroing-a-register/ https://randomascii.wordpress.com/2012/12/29/the-surprising-... is almost ten years old and thus likely dated, but still may be educational.
- nixpulvis 4y agoExactly! I was almost expecting to find a special instruction for this, but then again, why waste the opcodes!?