I worked at Intel’s main R&D site from Sandy bridge to Meteor Lake bring-up on a team looking at electrical data. As I recall, the first Cannonlake wafers produ

I worked at Intel’s main R&D site from Sandy bridge to Meteor Lake bring-up on a team looking at electrical data. As I recall, the first Cannonlake wafers produced data relevant to me around New Years Eve 2015. This was not the first 10nm wafer by a long shot —- the process had been in development for years at that point and with many test chips run. Still, the initial data was so unbelievably bad, due to the lowest metal layers (supposed to be 10nm’s secret sauce), that even just looking at the basic line resistor test structures it looked like the measurement machines had malfunctioned or had the wrong hardware configuration. Worst bring-up in my time. I feel bad for the architecture team. I know Intel is getting dunked on my AMD right now but internally the worst of it was years ago. I retain confidence in the direction things are heading now