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My (inexpert) view is that it might be the last ISA because a general purpose ISA will become less important. I see the cpu core as being more like a glue that
by zasdffaa 4y ago
My (inexpert) view is that it might be the last ISA because a general purpose ISA will become less important. I see the cpu core as being more like a glue that connects together specialist hardware, so you have a wide SIMD number cruncher (like AVX) but probably off-core, likewise off-core compression (perhaps), encryption, graphics (already there really), prob matrix mult, all the fancy hardware for AI that's coming out now, possibly embedded prolog/logical deduction device etc.
So the main ISA will be little more than a distribution device for allocating tasks to subunits, and no-one will care how it's put together.
But I'm no expert.
- sparkie 4y agoThe primary issue here is that it is expensive to move data between processing units, and having them share memory has all the common problems with race conditions and cache invalidation. So while we can continue to squeeze more onto a smaller die, providing more capabilities on the same processor looks like it will win out for some time yet.
- zasdffaa 4y ago> The primary issue here is that it is expensive to move data between processing units I'm thinking of them all on a chip (or even same core) with external DRAM shared, and cpu cache shared. > and having them share memory has all the common problems with race conditions and cache invalidation That's pretty well a solved problem, or modern OS's wouldn't work. > providing more capabilities on the same processor looks like it will win out for some time yet I agree, for now, tomorrow's cpu will look like today's. But further out, I expect my view might perhaps start coming to pass.
- hajile 4y agoYou are arguing both sides here. You argue that moving data between discrete processors is bad then argue that sharing memory with processors is also bad. One of the two certainly MUST happen. GPUs seem to on the right path here as the trend toward a thread manager sending data to various CPU/ALU/SIMD/matrix/whatever units.