3 ms·
I always thought the minimum frequency was due to the usage of DRAM-like registers
by colejohnson66 4y ago
I always thought the minimum frequency was due to the usage of DRAM-like registers
- mjevans 4y agoThe gate drive sort of does act like a temporary DRAM cell, it's presumably only good for a maximum duration of time, hence a minimum clock rate.
- deleted 4y ago[deleted]
- kens 4y agoThere are a lot of different factors going on. For the older chips I look at, pass transistors are used a lot to hold things for one clock cycle, and these need a minimum frequency before the bits leak away. Registers are usually cross-coupled inverters, so they are stable. (Although the 8008 used dynamic registers.) The 8086 uses some dynamic (precharge) logic in its ALU, which needs the clock to keep going, and I hear modern chips use a lot of dynamic logic. The bootstrap drivers in this post will mostly work with a slow frequency, but will lose some of the boost. Note that you still have setup and hold timing requirements even with completely synchronous and static logic, due to metastability, propagation delay, etc.