3 ms·

> Every one-byte x86 push becomes a four byte ARM instruction Can someone explain this to me? I don’t know ARM but it just seems to me a push should not be tha

by tomcam 4y ago

> Every one-byte x86 push becomes a four byte ARM instruction Can someone explain this to me? I don’t know ARM but it just seems to me a push should not be that expensive.

dougall 4y ago
Bit late, and the other comments are right, but it's worth noting that pushes typically aren't that expensive. ARM has a 4-byte STP (store paired) instruction that pushes two values at a time. So usually a push only costs two bytes on ARM, but if you're translating instruction-for-instruction it's four bytes. (I also forgot while writing the post that 2-byte push instructions are common in 64-bit x86 as well. Half the registers can be pushed with a single byte, and the other half require a REX prefix, giving a two-byte push instruction. So even though the quoted statement is true, the difference isn't that bad in general.)
TazeTSchnitzel 4y ago
x86 has variable-length instructions, so they can be anything from 1 to 15 bytes long. AArch64 instructions are always 4 bytes long.
jasonwatkinspdx 4y ago
The general principle is that RISC style instruction sets are typically fixed length and with only a couple different subformats. Like the prototypical RISC design has one format with an opcode and 3 register fields, and then a second with an opcode and an immediate field. This simplicity and regularity makes the fastest possible decoding hardware much more simple and efficient compared to something like x86 that has a simply dumbfounding number of possible variable length formats. The basic bet of RISC was that larger instruction encodings would be worth it due to the micro architectural advantages they enabled. This more or less was proven out, though the distinction is less distinct today with x86 decoding into uOps and recent ARM standards being quite complex beasts.

3 ms·

> Every one-byte x86 push becomes a four byte ARM instruction Can someone explain this to me? I don’t know ARM but it just seems to me a push should not be tha

by tomcam 4y ago

> Every one-byte x86 push becomes a four byte ARM instruction Can someone explain this to me? I don’t know ARM but it just seems to me a push should not be that expensive.

dougall 4y ago
Bit late, and the other comments are right, but it's worth noting that pushes typically aren't that expensive. ARM has a 4-byte STP (store paired) instruction that pushes two values at a time. So usually a push only costs two bytes on ARM, but if you're translating instruction-for-instruction it's four bytes. (I also forgot while writing the post that 2-byte push instructions are common in 64-bit x86 as well. Half the registers can be pushed with a single byte, and the other half require a REX prefix, giving a two-byte push instruction. So even though the quoted statement is true, the difference isn't that bad in general.)
TazeTSchnitzel 4y ago
x86 has variable-length instructions, so they can be anything from 1 to 15 bytes long. AArch64 instructions are always 4 bytes long.
jasonwatkinspdx 4y ago
The general principle is that RISC style instruction sets are typically fixed length and with only a couple different subformats. Like the prototypical RISC design has one format with an opcode and 3 register fields, and then a second with an opcode and an immediate field. This simplicity and regularity makes the fastest possible decoding hardware much more simple and efficient compared to something like x86 that has a simply dumbfounding number of possible variable length formats. The basic bet of RISC was that larger instruction encodings would be worth it due to the micro architectural advantages they enabled. This more or less was proven out, though the distinction is less distinct today with x86 decoding into uOps and recent ARM standards being quite complex beasts.