9 ms·
There is latency associated with coming out of deeper C-states (from hundreds of microseconds to milliseconds, depending on the transition, which may include L1
by derf_ 4y ago
There is latency associated with coming out of deeper C-states (from hundreds of microseconds to milliseconds, depending on the transition, which may include L1 and L2 cache flushes, etc.), so it isn't just the power. It's faster, too.
It might reduce throughput of a single-threaded process, but perhaps not even that if it avoids bouncing cache lines around to different cores.
Remember, though, that almost all timers never reach expiration, anyway, so the real savings here is the 25% reduction in the time to set or cancel a timer. That work, if it ever gets done, is now deferred to when a CPU is about to go idle, which (by definition) means it has nothing better to do.
- deleted 4y ago[deleted]