the bandwidth constraints will be significantly ameliorated by v-cache skus, I'd imagine. I think AVX-512 tasks especially may be among those that see benefits

the bandwidth constraints will be significantly ameliorated by v-cache skus, I'd imagine. I think AVX-512 tasks especially may be among those that see benefits from v-cache: vector workloads tend to imply larger working sets, and usually like cache and bandwidth and lower latency as well. (technically, the way AMD did v-cache in zen3 meant that cache bandwidth didn't change, just higher hitrate, but, it doesn't mean it will always be done that way in the future. RDNA3 saw a shift from a focus on capacity/hitrate towards higher bandwidth - infinity cache stayed the same size but much higher bandwidth, which of course requires more transistors. Maybe we will see something similar on Zen4 - you could have a Crystal Well-style L4 or 6775R-style side-cache. Or even both a side-cache and a big L3 on the same design - just stack them.)