I'm no expert (but I do work with this stuff regularly) and I realize this is gcc documentation vs llvm docs. Regardless, arm32/64 has a lot of optional instruc

I'm no expert (but I do work with this stuff regularly) and I realize this is gcc documentation vs llvm docs. Regardless, arm32/64 has a lot of optional instruction sets that may or may not be supported on a given processor as improvements have been made over time. For example, check out the feature modifiers at the bottom of the page here for aarch64: https://gcc.gnu.org/onlinedocs/gcc-12.2.0/gcc/AArch64-Options.html#AArch64-Options https://gcc.gnu.org/onlinedocs/gcc-12.2.0/gcc/AArch64-Option... Versus RISC-V: https://gcc.gnu.org/onlinedocs/gcc-12.2.0/gcc/RISC-V-Options.html#RISC-V-Options https://gcc.gnu.org/onlinedocs/gcc-12.2.0/gcc/RISC-V-Options... Arm32 is even more complex: https://gcc.gnu.org/onlinedocs/gcc-12.2.0/gcc/ARM-Options.html#ARM-Options https://gcc.gnu.org/onlinedocs/gcc-12.2.0/gcc/ARM-Options.ht...