3 ms·
It’s built from the bottom up in layers (at least traditionally, I’m not sure how the newer 3D structures for memory are constructed). The bottom layer of silic
by variadix 4y ago
It’s built from the bottom up in layers (at least traditionally, I’m not sure how the newer 3D structures for memory are constructed). The bottom layer of silicon substrate is covered in an oxide and etched selectively by photoresist and masking. Further layers are connective layers of metal lines insulated by oxide, with vias connecting metal layers to one another. The same oxide deposition, photoresist, expose, etch process is used for each layer.
- mattbillenstein 4y agoHaven't worked in the space in more than 15 years, but as I recall there were dozens of masks - maybe upwards of 50 - when I was doing ASIC. And I believe there were steps to flatten and I believe effectively sand the surface flat after some layers.
- JumpCrisscross 4y ago> oxide deposition, photoresist, expose, etch process is used for each layer Would note that since FinFETs, deposition occurs from the side as well as top.