3 ms·
Do pacemakers not use ECC? Not saying that makes 'em cosmic ray proof, but my understanding is it can harden you by an order of magnitude or more (and help gua
by rkagerer 4y ago
Do pacemakers not use ECC?
Not saying that makes 'em cosmic ray proof, but my understanding is it can harden you by an order of magnitude or more (and help guard against glitches from other sources).
If I was designing something this life-crucial from silicon up, every single bit of memory (including registers) would have extra bits for this, and checks would occur everywhere it's moved or used (even over buses inside IC's, regardless of whether they shift data, addresses, control logic, etc). My code would go to great lengths to verify it hasn't been corrupted. The culture of redundancy might be akin to that seen in the Space Shuttle control systems.
Silicon is so damn cheap nowadays it shouldn't be the constraint. That it's hard to source components of such pedigree is disheartening. Basic ECC should be an industry norm for all but the lowest-end chips, and as feature sizes shrink further I hope sound engineering will become a bigger product differentiator.
(Look at how HDD's have been getting more bits of ECC as platters become denser).
If more die for our buck doesn't equal less die for ourselves then we're doing something wrong.
Also, here's an interesting paper about radiation effects on pacemakers (from the perspective of cancer treatment) that I came across when searching whether radiation-hardening in this field is a thing:
https://aapm.onlinelibrary.wiley.com/doi/pdf/10.1118/1.597259 https://aapm.onlinelibrary.wiley.com/doi/pdf/10.1118/1.59725...
- abfan1127 4y agoits been 10 years since I designed them, but back then, no they didn't. Silicon is pretty cheap, but power is very expensive. ECC drives up memory power quite a bit. Both static and dynamic power are impacted.
- smallpipe 4y ago> every single bit of memory (including registers) would have extra bits for this, and checks would occur everywhere it's moved or used (even over buses inside IC's, regardless of whether they shift data, addresses, control logic, etc). That's one of the two approaches used for automotive silicon. The other, which is a bit more expensive but usually considered safer, is to run the same circuit twice in parallel (usually with a few cycles of offset) and compare the outputs. If those outputs don't match, the system is reset into a fail-safe mode.
- Gordonjcp 4y agoIn practice what you do is design it to crash easily and recover quickly. Computers are fast, hearts are slow. Your microcontroller can go "huh, that set of readings is bollocks, let's restart and try again" several times between beats. Even better, a pacemaker is not literally constantly driving a patient's heart, continuously. It's giving it a nudge every now and again if it's drifting out of whack. Think PLL rather than master clock ;-)